LTC4232
3
4232fa
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Inputs
I
IN
OV, UV, FB Pin Input Current
V = 1.2V
l
0
?
礎
V
TH
OV, UV, FB Pin Threshold Voltage
V
PIN
Rising
l
1.21
1.235
1.26
V
V
OV(HYST)
OV Pin Hysteresis
l
10
20
30
mV
V
UV(HYST)
UV Pin Hysteresis
l
50
80
110
mV
V
UV(RTH)
UV Pin Reset Threshold Voltage
V
UV
Falling
l
0.55
0.62
0.7
V
V
FB(HYST)
FB Pin Power Good Hysteresis
l
10
20
30
mV
R
ISET
I
SET
Pin Output Resistor
l
19
20
21
k?
Outputs
V
INTVCC
INTV
CC
Output Voltage
V
DD
= 5V, 15V, I
LOAD
= 0mA, 10mA
l
2.8
3.1
3.3
V
V
OL
PG, FLT Pin Output Low Voltage
I = 2mA
l
0.4
0.8
V
I
OH
PG, FLT Pin Input Leakage Current
V = 30V
l
0
?0
礎
V
TIMER(H)
TIMER Pin High Threshold
V
TIMER
Rising
l
1.2
1.235
1.28
V
V
TIMER(L)
TIMER Pin Low Threshold
V
TIMER
Falling
l
0.1
0.21
0.3
V
I
TIMER(UP)
TIMER Pin Pull-Up Current
V
TIMER
= 0V
l
80
100
120
礎
I
TIMER(DN)
TIMER Pin Pull-Down Current
V
TIMER
= 1.2V
l
1.4
2
2.6
礎
I
TIMER(RATIO)
TIMER Pin Current Ratio I
TIMER(DN)
/I
TIMER(UP)
l
1.6
2
2.7
%
A
IMON
I
MON
Pin Current Gain
I
OUT
= 2.5A
l
18.5
20
21.5
礎/A
I
OFF(IMON)
I
MON
Pin Offset Current
I
OUT
= 150mA
l
0
?.5
礎
I
GATE(UP)
Gate Pull-Up Current
Gate Drive On, V
GATE
= V
OUT
= 12V
l
18
24
29
礎
I
GATE(DN)
Gate Pull-Down Current
Gate Drive Off, V
GATE
= 18V, V
OUT
= 12V
l
180
250
340
礎
I
GATE(FST)
Gate Fast Pull-Down Current
Fast Turn Off, V
GATE
= 18V, V
OUT
= 12V
140
mA
AC Characteristics
t
PHL(GATE)
Input High (OV), Input Low (UV) to Gate Low
Propagation Delay
V
GATE
< 16.5V Falling
l
8
10
祍
t
PHL(ILIM)
Short-Circuit to Gate Low
V
FB
= 0, Step I
SENSE
to 6A,
V
GATE
< 15V Falling
l
1
5
祍
t
D(ON)
Turn-On Delay
Step V
UV
to 2V, V
GATE
> 13V
l
50
100
150
ms
t
D(CB)
Circuit Breaker Filter Delay Time (Internal)
V
FB
= 0V, Step I
SENSE
to 3A
l
1.3
2
2.7
ms
t
D(AUTO-RETRY)
Auto-Retry Turn-On Delay (Internal)
l
50
100
150
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
Note 3: An internal clamp limits the GATE pin to a maximum of 6.5V
above OUT. Driving this pin to voltages beyond the clamp may damage the
device.
Note 4: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125癈 when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 5: T
J
is calculated from the ambient temperature, T
A
, and power
dissipation, P
D
, according to the formula:
T
J
= T
A
+ (P
D
" 46癈/W)
elecTrical characTerisTics
The l denotes those specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25癈. V
DD
= 12V unless otherwise noted.
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